Intel
Bengaluru, Karnataka, India Posted 6d ago
Performs physical design implementation of CPU designs from RTL to GDS to create a design database that is ready for manufacturing at Intel.
Key Responsibilities
Perform physical design implementation from RTL to GDSII, including synthesis, placement, routing, clock tree synthesis, and optimization.
Conduct static timing analysis, power distribution analysis, and reliability verification to ensure design convergence and high manufacturability.
Collaborate with logic, circuit, architecture, and automation teams to improve CPU microarchitectures and design methodologies.
Work closely with industry-leading EDA vendors to enhance tool capabilities for high-speed, low-power CPU development.
Optimize designs for power, frequency, and area, ensuring product-level parameter excellence.
Participate in developing and improving physical design methodologies and flow automation for future projects.
Requirements
B. Tech or M. Tech degree in Electrical, Electronics with 3+ years of relevant experience.
Technical expertise in synthesis, placement, clock tree synthesis (CTS), and routing tools, particularly using Synopsys and Cadence platforms.
Proficiency in timing signoff, formal verification, and low-power design techniques.
Solid understanding of submicron process node technologies and layout verification methods such as LVS/DRC.
Skilled in power estimation, power optimization, and power delivery methodologies.
Preferred Qualifications
Familiarity with scripting languages like Tcl, Perl, and Python for automating physical design workflows.
Experience with Verilog or VHDL for hardware description and design execution.
Strong communication skills, both verbal and written, for collaborative problem-solving.
Demonstrated ability to work effectively in dynamic environments across geographies.
Knowledge of innovative feature feasibility studies and SD flow methodologies.
