Intel
Bengaluru, Karnataka, India Posted 2d ago
Intel's P-Core organization is seeking an experienced engineering manager to lead the Memory Execution Unit Front-End development team, delivering world-class CPU microarchitecture solutions for next-generation products. You will own end-to-end execution of the cluster across RTL design, design verification, and formal verification.
Key Responsibilities
Own end-to-end delivery of the MEU cluster across RTL, DV, and Formal Verification functions.
Drive microarchitecture reviews, implementation strategy, verification closure, and quality signoff.
Ensure delivery of features meeting Power, Performance, Area, Quality, Reliability, and Security objectives.
Lead and grow an experienced team of RTL, DV, and Formal Verification engineers.
Partner with Architecture, Design, Validation, Physical Design, DFT, Power, Security, and Product Engineering teams.
Requirements
Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or related field with 15+ years of industry experience, or Master's degree with 12+ years of experience.
5+ years of engineering management experience leading senior technical teams.
Strong expertise in CPU microarchitecture, RTL design, verification methodologies, and formal verification.
Deep understanding of SystemVerilog, verification methodologies, assertions, coverage-driven verification, and formal tools.
Preferred Qualifications
Experience leading large Front-End CPU organizations spanning RTL, DV, and Formal Verification.
Expertise in Out-of-Order CPUs, Memory Subsystems, Cache Coherency, or Execution Units.
